The increasing integration of semiconductor components and the continually rising number of electrical connections between wafers and the carrier elements thereof and, in particular, the required miniaturization in the sense of assemblies that are as flat as possible have led to the use of the direct contact-connection of the semiconductor chips on the carrier elements (e.g., flip-chip bonding).
However, in order to enable a direct contact-connection of semiconductor chips on carrier elements, such as a PCB (printed circuit board), it is necessary to produce on the semiconductor chip 3-D structures which end at their respective highest point in a gold-plated contact element and are connected to a bonding pad of the wafer via an interconnect. This gold-plated contact area may then be provided with a solder material and be electrically and mechanically connected to a corresponding soldering contact on the PCB.
In order to achieve a certain compensation of mechanical loading on the finished assembly, e.g., caused by different thermal expansion coefficients of the individual components or during the handling thereof, the basic structure of the 3-D structure may be produced from a compliant material, e.g., silicone, thus resulting in a three-dimensional, mechanically flexible structure which is fixedly connected to the wafer.
The interconnects (reroute layer) used for the electrical connection between the bonding pad and the 3-D structure are constructed on a seed layer, on which is grown a copper interconnect and, above the latter, a nickel layer, which serves to protect the copper layer from corrosion.
In order to achieve a solderability of the contact element, the nickel layer must be coated with gold in this region at least on the tip of the 3-D structure.
The required patterning of all the layers and functional elements is usually realized by photolithographic processes.
The functional elements are patterned after the deposition of a photoresist on the wafer, e.g., by the dispensing or printing and subsequent exposure and development of the photoresist to produce a resist mask. A metallization made of copper, nickel and gold may then be constructed within the openings of the resist mask on the seed layer. Afterwards, the gold layer must be partially covered by a lithography in such a way that the undesired regions of the gold layer can be selectively etched and, finally, all that remains is a gold layer on the tip of the 3-D structure.
This method can be represented in summary by the following process flow:                deposition of the seed layer;        EPR1 (epoxy photoresist 1): coating and patterning of the EPR1 photoresist mask (lithography step 1);        reroute plating, production of the copper/nickel layer on the seed layer;        coating of the reroute layer with gold;        EPR2 (epoxy photoresist 2): coating and patterning of the EPR2 photoresist mask (lithography step 2); and        selective etching of the Au layer (wet etching or removal/stripping).        
In this method, the application of the photoresist is highly problematic due to the 3-D structures on the wafer. The formation of the 3-D structures on the wafer leads to a greatly fissured surface, so that, during the application of a photoresist by the customary coating methods such as printing or dispensing, it cannot be ensured that the thickness of the applied photoresist is the same at every point of the surface in spite of the structure of the wafer surface. Thus, it must be expected, for example, that the photoresist will run down at least partially on the 3-D structures and, consequently, have an excessively small thickness on the 3-D structures as a result. It must also be expected that the photoresist will uniformly fill, or even out, depressions on the wafer, so that a larger thickness of the photoresist is to be noted in the region of the depressions.
However, in order to be able to produce structures suitable for subsequent processing steps, e.g., metallization, by means of the photolithography on the wafer, it must be ensured that the photoresist is distributed as uniformly as possible with a uniform thickness along the structure after the application on the wafer. That is particularly difficult in the case of 3-D structures, as already explained. The problems multiply if a plurality of photolithographic steps have to be carried out one after the other.
This problem also exists in a similar manner in the case of the photolithographic patterning of printed circuit boards (PCBs). The process of coating with a resist is effected by electrodeposition of an electrophoretic resist, in this case the entire printed circuit board being suspended perpendicularly into the electrophoretic resist. This is necessary in order to prevent the unavoidable outgasing of hydrogen from leading to disturbances of the coating (pinholes) during the coating operation. However, since it is absolutely necessary to prevent the rear side of the printed circuit board from likewise being coated with the resist, the rear side of the printed circuit board is covered with the aid of a film or the like prior to coating.
It has been shown, however, that transferring this method to the patterning of 3-D structures and effecting a reroute layer on wafers in this way is not suitable since in practice it is virtually impossible to suspend the wafers perpendicularly into an electrophoretic resist and at the same time prevent the wafer's rear side from being coated.